Quantum computers are too error-prone to outperform ordinary machines, and this project builds a toolkit to fix that. Errors are the main obstacle preventing quantum computers from beating classical ones in practical tasks like drug simulation or code-breaking. Two existing approaches—quantum error correction and quantum error mitigation—each have trade-offs: correction is robust but demands many extra qubits; mitigation uses fewer resources but cannot scale alone. This project develops a unified framework that combines both methods, designs processor architectures tailored to specific error-suppression schemes, and co-designs qubits with those schemes at the hardware level. It also refines noise-characterisation protocols using shadow tomography to better understand device errors. If successful, the work could produce the first full-stack optimised error-suppression strategy for a specific application and hardware platform, with measured performance gains and resource reductions. The long-term goal is a generalised pipeline that automatically generates bespoke error-suppression schemes for different hardware and tasks. This would bring reliable, scalable quantum computation closer to real-world use in areas such as materials design, cryptography, and machine learning—systems that quietly underpin modern infrastructure but currently lie beyond the reach of noisy quantum devices.
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Quantum computers promise profound advantages over conventional computers in applications like chemistry simulation, decryption, and machine learning. However, they are also much more susceptible to errors arising from imperfect manipulation and unwanted interaction with their surroundings. Indeed, these errors are the main obstacles preventing us from achieving quantum advantage — a milestone where quantum computers outperform traditional computers in practical tasks. Quantum error correction (QEC) is the canonical way to tackle these errors. It employs additional qubits to encode and protect the quantum information, offering a robust solution but at the cost of substantial hardware resources. Quantum error mitigation (QEM), on the other hand, uses additional noisy circuit runs to probe the damages caused by the noise in order to reverse them. The hardware requirement of QEM is low, but it cannot be scaled to arbitrarily large computations if applied alone. With the recent rapid advance of quantum hardware, two pivotal milestones lie ahead: the practical application of noisy intermediate-scale quantum devices using QEM, and the experimental validation of full QEC for long-term scalability. My research will centre around these two critical goals and beyond, developing a comprehensive error suppression framework incorporating both QEC and QEM to pave the way towards noise-resilient quantum computation. My project will start with designing a fundamental framework for QEM in the same spirit as those that existed in QEC. Such a framework can inspire novel constructions of QEM and QEC methods, with the help of the new space-time perspective on QEC. Recognising that QEC and QEM will co-exist for the foreseeable future to provide maximal error suppression power, I will explore the advantages of their combination. For different error suppression techniques, I will design bespoke quantum processor architectures taking into account the hardware constraints, and explore the possibility of tailoring a given error suppression scheme towards the hardware platform or optimising it accordingly for different applications. Zooming down to the lowest hardware level where a qubit is defined, I will look into the advantages of co-designing the qubit alongside the error suppression schemes. Another crucial aspect of error suppression is understanding the noise profile in a device, which I will refine by adapting noise characterisation protocols towards the QEM/QEC schemes on top, with the help of shadow tomography techniques. All of the novel error suppression schemes that I developed will be tested and validated in experiments via academic and industrial collaborators. At the end of this project, having worked on error suppression across different layers in the quantum computation stack, we can compile the results we have obtained into the first instance of a full-stack optimised error suppression strategy for a specific application scenario and hardware platform, and calculate the corresponding performance improvement and resource reduction achieved. Ultimately, my long-term vision is to generalise this instance into a full-stack error suppression pipeline for quantum computation that can automatically generate the optimised error suppression schemes for different hardware and tasks, ensuring reliable and scalable quantum computation in a wide range of use cases. This is of course a very challenging goal, but such a bespoke optimised error suppression strategy is a critical step towards finally unlocking the true potential of quantum computation for real-world applications.
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